Meh, I'll just skip waiting for Hans to answer, because I'm exhausted after wading through posts on the Intel forums that have semi-broken English...
From what I've been able to determine, the only way to generate SSE3 code in a 32-bit build on AMD systems is to use IPP 6.1. With IPP 7.0, Intel, in their ever-so-restrictive mindset, removed the t7 optimizations. The t7 optimizations were the SSE3 instructions. They made the executive decision that on P4 with SSE3, there was not enough difference between t7 and w7 (SSE2), so they would no longer provide the t7 optimizations on IA-32. Who cares about all the AMD systems that might've done better with t7, right? There was a modest uproar from developers who knew they had AMD end-users, but the only thing told to them was that their feedback would be forwarded and that there *might* be an inclusion of SSE3 inside the w7 optimization. I haven't been able to find any documentation that SSE3 made it into w7 though.
So, my question to Hans about the dynamic vs. static linking had to do with both this, and, if static, if ippInit() is called when it should be.
As an aside, given all the difficulties with migrating from 10.1 to 13.x, and now the 6.x vs. 7.x issue, perhaps looking into the AMD performance libraries (Framewave) might be a worthwhile venture. Their claim is that their libraries do not check for processor manufacturer, only feature flags.
That said though, technically speaking, what Intel did with IPP 7.0 isn't checking manufacturer either, but when they made the decision to ditch SSE3 out of the 32-bit code paths, they knew full well that there were no AMD processors that supported SSSE3 or SSE4.x. In other words, the move can be viewed as a loophole in the AMD settlement where they said they would no longer hinder performance.
Here's a quote from one of their fine forum representatives about "older" systems. Check the bolded and underlined part, and bear in mind that a brand new, top-of-the-line AMD processor at that time in 2010 had no SSE4.1 or 4.2 support.
Quote:
vladimir-dudnik (Intel)
Thu, 06/17/2010 - 09:33
Intel does not sell SSE3 processors anymore. I do not think there is any legal obligation to support end-of-lifed products for any company. Otherwise we just will not be able to deliver new technologies like Westmere or AVX processors (which is coming soon).
The functionality you are looking for still be available in IPP 6.1 product.
By the way, the performance oriented customers migrating to the newest platforms. I personally would not consider those who use old or even end of lifed platforms as performance oriented customers. If they do not care about performance why anyone else should do?
Regards,
Vladimir
Arrogant jerk... Never heard of not having the money I suppose. Also completely ignored (likely intentionally) that there were no AMD systems that could support SSE4.1 or 4.2 at the time. Again, arrogant jerk... Finally, yes, Intel was selling "SSE3" processors, as they are still selling them today. If they weren't, then your i7 processor wouldn't support SSE3, now would it? Thu, 06/17/2010 - 09:33
Intel does not sell SSE3 processors anymore. I do not think there is any legal obligation to support end-of-lifed products for any company. Otherwise we just will not be able to deliver new technologies like Westmere or AVX processors (which is coming soon).
The functionality you are looking for still be available in IPP 6.1 product.
By the way, the performance oriented customers migrating to the newest platforms. I personally would not consider those who use old or even end of lifed platforms as performance oriented customers. If they do not care about performance why anyone else should do?
Regards,
Vladimir
BTW, you participated in that thread...