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Hm, surprising that that code is there. I still expect the code to run the same on an AMD though, because when I removed the 'generic' path from the executable it shrunk about 20% in size - so there shouldn't be a generic path. Also, any manually optimized SSE2 code is definitely in there (because I used #ifdef 's for that).
Having said that, the result of a test with this check bypassed (as you were looking for) would definitely be very interesting. Just to make sure.
The code runs, but the compiler may still be doing some trickery behind the scenes.
I have not had a chance to really scour Google for the W option. It gives the impression that it would give the same machine code to AMD, but I dunno...
What version of the compiler do you have? Also, you indicated you're using IPP 5.x for SSE and 6.x for SSE2? One other way this can sneak in on you is when the compiler links in IPP.
Have you ever tried a /QaxW /QxO compile? For that matter, /QaxW /QxN ?
AMD's SSE2 is identical to Intel's with the exception of HyperThreading support, so if code compiled with N will run on an AMD, then it should be compatible. Could just make a test version to see...and if it falls flat, then never mind that route...